(Electronics) from Mehran University Jamshoro, M.Engg.(Telecommunication) from NED University, Karachi. The proposed converter has high efficiency, fast response time and compact size due to least number of switches as compared to conventional topology of such converters.Īhmed Muddassir KHAN He has completed his early education from prestigious institutes of Pakistan with distinctions. Furthermore, efficiency of both kits is compared and analysed. The control of this converter topology is implemented by using FPGA kits Virtex5 and Virtex7. We have successfully integrated two different sources of energy which are being fed to the power stage. In this work, we proposed and analyse an efficient FPGA based PID controller using Hardware Co-simulation for DC-DC Buck Boost Converter. Moreover, a separate converter is required for each source used in the circuit. There are few critical challenges in existing converters such as low efficiency, slow response time, large circuit size due to more number of switches subsequently poor quality of PWM signal. NED University of Engineering and Technologyĭual input DC-DC converter, FPGA, MATLAB, Xilinx ISE design suite AbstractĬonverters are widely used in smart grid applications where multilevel dc voltage source are required in a system.
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